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  VNW100N04 "omnifet": fully autoprotected power mosfet preliminary data september 1996 block diagram type v clamp r ds(on) i lim VNW100N04 42 v 0.012 w 100 a n linear current limitation n thermal shut down n short circuit protection n integrated clamp n low current drawn from input pin n diagnostic feedback through input pin n esd protection n direct access to the gate of the power mosfet (analog driving) n compatible with standard power mosfet n standard to-247 package description the VNW100N04 is a monolithic device made using sgs-thomson vertical intelligent power m0 technology, intended for replacement of standard power mosfets in dc to 50 khz applications. built-in thermal shut-down, linear current limitation and overvoltage clamp protect the chip in harsh enviroments. fault feedback can be detected by monitoring the voltage at the input pin. 1 2 3 to-247 1/11
absolute maximum rating symbol parameter value unit v ds drain-source voltage (v in = 0) internally clamped v v in input voltage 18 v i d drain current internally limited a i r reverse dc output current -100 a v esd electrostatic discharge (c= 100 pf, r=1.5 k w ) 2000 v p tot total dissipation at t c = 25 o c 208 w t j operating junction temperature internally limited o c t c case operating temperature internally limited o c t stg storage temperature -55 to 150 o c thermal data r thj-case r thj-amb thermal resistance junction-case max thermal resistance junction-ambient max 0.6 30 o c/w o c/w electrical characteristics (t case = 25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v clamp drain-source clamp voltage i d = 50 a v in = 0 364248 v v clth drain-source clamp threshold voltage i d = 2 ma v in = 0 35 v v incl input-source reverse clamp voltage i in = -1 ma -1 -0.3 v i dss zero input voltage drain current (v in = 0) v ds = 13 v v in = 0 v ds = 25 v v in = 0 50 200 m a m a i iss supply current from input pin v ds = 0 v v in = 10 v 250 500 m a on ( * ) symbol parameter test conditions min. typ. max. unit v in(th) input threshold voltage v ds = v in i d + ii n = 1 ma 0.8 3 v r ds(on) static drain-source on resistance v in = 10 v i d = 50 a v in = 5 v i d = 50 a 0.012 0.015 w w dynamic symbol parameter test conditions min. typ. max. unit g fs ( * ) forward transconductance v ds = 13 v i d = 50 a 40 60 s c oss output capacitance v ds = 13 v f = 1 mhz v in = 0 2000 3000 pf VNW100N04 2/11
electrical characteristics (continued) switching ( ** ) symbol parameter test conditions min. typ. max. unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 15 v i d = 50 a v gen = 10 v r gen = 10 w (see figure 3) 110 500 1000 600 250 900 1800 1000 ns ns ns ns t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 15 v i d = 50 a v gen = 10 v r gen = 1000 w (see figure 3) 2.2 3.5 22 12 3.5 6 30 18 m s m s m s m s (di/dt) on turn-on current slope v dd = 15 v i d = 50 a v in = 10 v r gen = 10 w 55 a/ m s q i total input charge v dd = 15 v i d = 50 a v in = 10 v 190 nc source drain diode symbol parameter test conditions min. typ. max. unit v sd ( * ) forward on voltage i sd = 50 a v in = 0 1.6 v t rr ( ** ) q rr ( ** ) i rrm ( ** ) reverse recovery time reverse recovery charge reverse recovery current i sd = 50 a di/dt = 100 a/ m s v dd = 30 v t j = 25 o c (see test circuit, figure 5) 800 5 15 ns m c a protection symbol parameter test conditions min. typ. max. unit i lim drain current limit v in = 10 v v ds = 13 v v in = 5 v v ds = 13 v 35 35 50 50 65 65 a a t dlim ( ** ) step response current limit v in = 10 v v in = 5 v 50 130 80 200 m s m s t jsh ( ** ) overtemperature shutdown 170 o c t jrs ( ** ) overtemperature reset 155 o c i gf ( ** ) fault sink current v in = 10 v v ds = 13 v v in = 5 v v ds = 13 v 50 20 ma ma e as ( ** ) single pulse avalanche energy starting t j = 25 o c v dd = 20 v v in = 10 v r gen = 1 k w l = 10 mh 4j ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ** ) parameters guaranteed by design/characterization VNW100N04 3/11
during normal operation, the input pin is electrically connected to the gate of the internal power mosfet. the device then behaves like a standard power mosfet and can be used as a switch from dc to 50 khz. the only difference from the users standpoint is that a small dc current (i iss ) flows into the input pin in order to supply the internal circuitry. the device integrates: - overvoltage clamp protection: internally set at 42v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled ruggedness and energy handling capability. this feature is mainly important when driving inductive loads. - linear current limiter circuit: limits the drain current id to ilim whatever the input pin voltage. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold t jsh . - overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. overtemperature cutout occurs at minimum 170 o c. the device is automatically restarted when the chip temperature falls below 155 o c. - status feedback: in the case of an overtemperature fault condition, a status feedback is provided through the input pin. the internal protection circuit disconnects the input f rom the gate and connects it instead to ground via an equivalent resistance of 100 w . the failure can be detected by monitoring the voltage at the input pin, which will be close to ground potential. additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit (with a small increase in r ds(on) ). protection features VNW100N04 4/11
thermal impedance output characteristics static drain-source on resistance vs input voltage derating curve transconductance static drain-source on resistance VNW100N04 5/11
static drain-source on resistance capacitance variations normalized on resistance vs temperature input charge vs input voltage normalized input threshold voltage vs temperature normalized on resistance vs temperature VNW100N04 6/11
turn-on current slope turn-off drain-source voltage slope switching time resistive load turn-on current s lope turn-off drain-source voltage slope switching time resistive load VNW100N04 7/11
switching time resistive load step response current limit current limit vs junction temperature source drain diode forward characteristics VNW100N04 8/11
fig. 2: unclamped inductive waveforms fig. 3: switching times test circuits for resistive load fig. 4: input charge test circuit fig. 1: unclamped inductive load test circuits fig. 5: test circuit for inductive load switching and diode recovery times fig. 6: waveforms VNW100N04 9/11
dim. mm inch min. typ. max. min. typ. max. a 4.7 5.3 0.185 0.209 d 2.2 2.6 0.087 0.102 e 0.4 0.8 0.016 0.031 f 1 1.4 0.039 0.055 f3 2 2.4 0.079 0.094 f4 3 3.4 0.118 0.134 g 10.9 0.429 h 15.3 15.9 0.602 0.626 l 19.7 20.3 0.776 0.779 l3 14.2 14.8 0.559 0.413 0.582 l4 34.6 1.362 l5 5.5 0.217 m 2 3 0.079 0.118 dia 3.55 3.65 0.140 0.144 p025p to-247 mechanical data VNW100N04 10/11
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification s mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously s upplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems with out express written approval of sgs-thomson microelectonics. ? 1996 sgs-thomson microelectronics - printed in italy - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the n etherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a . . VNW100N04 11/11


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